The present invention relates in general to semiconductor technology and in particular to techniques for dividing a substrate into a plurality of die structures.
Semiconductor manufacturing techniques utilize a number of processes to form semiconductor structures on substrates. The substrate is typically part of a wafer. A wafer is a small thin circular slice of a semiconductor material, such as silicon, on which semiconductor structures are formed. Standard device fabrication processes, such as etching, deposition, and plating are used to fabricate semiconductor structures on the wafer.
The substrate is often used to structurally support the semiconductor structures and prevent damage due to mechanical flexing. The substrate may also be used as part of the semiconductor structure, supporting vertical or lateral current flows. In some devices, the substrate is used as an insulator where the substrate is configured to insulate the semiconductor structure from other semiconductor structures or from electronically coupling to a conductive surface.
In some devices, the substrate is used as part of the current conduction path. Examples of such devices are solid-state switches including the power metal-oxide-semiconductor field effect transistor (power MOSFET), the insulated-gate bipolar transistor (IGBT) and various types of thyristors. Some of the defining performance characteristics for the power switch are its on-resistance (i.e., drain-to-source on-resistance, RDSon), breakdown voltage, and switching speed.
Generally, smaller dimensions in semiconductor structures tend to reduce such parameters as resistance, power dissipation, and parasitic impedance. With regard to the semiconductor layers, for example, the thinner the semiconductor layers the better the semiconductor structure frequency of operation. Also, larger specific heat capacitance and more heat capacitive substrate materials tend to improve the heat dissipation characteristics of the semiconductor structures, whereas thinner substrates tend to improve frequency of operation for those devices that involve the substrate as part of the conduction path.
After the formation of the semiconductor structures, the wafer is tested and then diced up to separate individual semiconductor structures, generally referred to as dies. Conventional techniques for dividing a wafer into individual semiconductor structures have a number of drawbacks such as silicon chipping and cracking and die saw blade clogging. These and other drawbacks of conventional techniques are discussed in more detail below.
Accordingly, there is a need for improved techniques for dividing a wafer into individual semiconductor device structures.